介绍C16x系列微控制器的输入信号升降时序图及特性 下载
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正文:All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-
Triggers are intended to always provide proper internal low and high levels, even if an
undefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.
The hysteresis of these inputs, however, is very small, and can not be properly used in an
application to suppress signal noise, and to shape slow rising/falling input transitions.
Thus, it must be taken care that rising/falling input signals pass the undefined area of the
TTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usual
and specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).
The effect of the implemented Schmitt-Trigger is that even if the input signal remains in
the undefined area, well defined low/high levels are generated internally. Note that all
input signals are evaluated at specific sample points (depending on the input and the
peripheral function connected to it), at that signal transitions are detected if two
consecutive samples show different levels. Thus, only the current level of an input signal
at these sample points is relevant, that means, the necessary rise/fall times of the input
signal is only dependant on the sample rate, that is the distance in time between two
consecutive evaluation time points. If an input signal, for instance, is sampled through
software every 10us, it is irrelevant, which input level would be seen between the
samples. Thus, it would be allowable for the signal to take 10us to pass through the
undefined area. Due to the sample rate of 10us, it is assured that only one sample can
occur while the signal is within the undefined area, and no incorrect transition will be
detected. For inputs which are connected to a peripheral function, e.g. capture inputs, the
sample rate is determined by the clock cycle of the peripheral unit. In the case of the
CAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requires
input signals to pass through the undefined area within these 400ns in order to avoid
multiple capture events.
如果觉得《介绍C16x系列微控制器的输入信号升降时序图及特性》不错,可以推荐给好友哦。
正文:All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-
Triggers are intended to always provide proper internal low and high levels, even if an
undefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.
The hysteresis of these inputs, however, is very small, and can not be properly used in an
application to suppress signal noise, and to shape slow rising/falling input transitions.
Thus, it must be taken care that rising/falling input signals pass the undefined area of the
TTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usual
and specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).
The effect of the implemented Schmitt-Trigger is that even if the input signal remains in
the undefined area, well defined low/high levels are generated internally. Note that all
input signals are evaluated at specific sample points (depending on the input and the
peripheral function connected to it), at that signal transitions are detected if two
consecutive samples show different levels. Thus, only the current level of an input signal
at these sample points is relevant, that means, the necessary rise/fall times of the input
signal is only dependant on the sample rate, that is the distance in time between two
consecutive evaluation time points. If an input signal, for instance, is sampled through
software every 10us, it is irrelevant, which input level would be seen between the
samples. Thus, it would be allowable for the signal to take 10us to pass through the
undefined area. Due to the sample rate of 10us, it is assured that only one sample can
occur while the signal is within the undefined area, and no incorrect transition will be
detected. For inputs which are connected to a peripheral function, e.g. capture inputs, the
sample rate is determined by the clock cycle of the peripheral unit. In the case of the
CAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requires
input signals to pass through the undefined area within these 400ns in order to avoid
multiple capture events.
如果觉得《介绍C16x系列微控制器的输入信号升降时序图及特性》不错,可以推荐给好友哦。
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